dorsaVi Finalises RRAM-CMOS Validation Chip Design
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| Stock | Dorsavi Ltd (DVL.ASX) |
|---|---|
| Release Time | 18 Jun 2026, 9:04 a.m. |
| Price Sensitive | Yes |
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Dorsavi Finalizes RRAM-CMOS Validation Chip Design
Key Points
- Completed design package for integrated RRAM-CMOS chip
- Includes self-checking write-and-verify circuitry
- Compute-in-Memory for local accumulation across inputs
- Scales on standard commercial CMOS foundry lines
Full Summary
Dorsavi Limited (ASX: DVL) has completed the design of its first integrated RRAM-CMOS validation chip, developed in collaboration with NTU Singapore and ITRI Taiwan. The chip includes a self-checking write-and-verify circuit, compute-in-memory capability, and is built to scale on standard commercial CMOS foundry lines. These features aim to enhance memory reliability, reduce data movement between memory and processors, and support local decision-making in edge applications. The chip is targeted at high-value markets such as exoskeletons, defense, robotics, and industrial AI, where local, low-power, non-volatile intelligence is crucial.
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